High-Speed Digital Signal Integrity (SI/PI)
Test solutions for high-speed digital link validation
Overview
SI/PI solutions for eye-mask compliance, S-parameter modeling, and de-embedding. Measure true die-side behavior with multi-brand support and rental or pre-owned options.
Industry Challenges
Eye closure and low margin in multi‑Gbps links
Excessive RJ/DJ impacting BER
Reflections from impedance discontinuities
PDN noise coupling into signal lanes
Fixture artifacts masking DUT behavior
Standards & Specifications
Core Principles
Eye Diagram Fundamentals
Eye Height (V) = V_high(min) - V_low(max) Eye Width (UI) = T_cross_right - T_cross_left Eye Opening (%) = (Actual Eye Height / Ideal Swing) × 100% BER estimation from eye: Q = Eye Height / (2 × σ_noise) BER ≈ 0.5 × erfc(Q / √2) Ref: IEEE 802.3 Clause 83 (100GBASE), USB-IF CTS
Jitter Decomposition (RJ/DJ)
Total Jitter at specific BER: TJ@BER = DJ + 2 × N(BER) × RJ(rms) Where N(BER) is the tail probability factor: • TJ@10⁻¹² ≈ DJ + 14.07 × RJ • TJ@10⁻¹⁵ ≈ DJ + 15.88 × RJ DJ components: ISI + DCD + PJ + BUJ RJ: Gaussian, unbounded (thermal + phase noise) Ref: JEDEC JESD65C, FC-PI-5
Transmission Line Effects
Transmission line required when: t_rise < 2 × t_propagation Propagation delay (FR4): ~150 ps/inch (~6 ns/m) Critical length = t_rise / (2 × t_pd) Reflection coefficient: Γ = (Z_L - Z_0) / (Z_L + Z_0) Ref: IPC-2141A
Bandwidth Selection
Minimum bandwidth: BW ≥ 0.35 / t_rise (for 10-90% rise time) BW ≥ 0.22 / t_rise (for 20-80% rise time) For digital signals: • NRZ: BW ≥ 0.75 × Data Rate • PAM4: BW ≥ 1.5 × Baud Rate (for 5th harmonic) Ref: Application-specific (per standard mask requirements)
S-Parameter Analysis
Return Loss: RL (dB) = -20·log₁₀|S11| Insertion Loss: IL (dB) = -20·log₁₀|S21| Differential S-parameters: Sdd21 = 0.5 × (S21 - S23 - S41 + S43) De-embedding (2x-Thru method): S_DUT = T⁻¹_left × T_measured × T⁻¹_right Ref: IEEE 370-2020
Power Integrity (PDN)
Target impedance: Z_target = ΔV_allowed / ΔI_max = (V_dd × Ripple%) / I_transient Example: 1V, 5% ripple, 10A step → Z_target = 5 mΩ PDN resonance check: f_resonance = 1 / (2π√(L_pkg × C_decap)) Ref: Intel PDN guidelines, JEDEC JEP181
Typical Test Tasks
Eye/Jitter Analysis
- Eye DiagramMeasure eye height, width, and crossing percentage
- Jitter DecompositionBreak down TJ into RJ/DJ components
- Mask TestingCompliance against standard mask templates
- BER PredictionStatistical bit error rate estimation
S-Parameter Analysis
- Insertion Loss (S21)Channel attenuation vs. frequency
- Return Loss (S11/S22)Impedance matching assessment
- Crosstalk (NEXT/FEXT)Adjacent channel interference
- TDRLocate impedance discontinuities
Power Rail Testing
- Ripple CapturemV-level noise for AI/FPGA validation
- PDN ImpedanceFrequency-domain impedance curves
- Transient ResponseLoad-step voltage droop analysis
Recommended Configuration
High-Bandwidth Oscilloscope
- Bandwidth sized per standard/mask margin (NRZ ~ data rate/2 to 1x; PAM4 higher)
- Sample rate ≥ 4× bandwidth
- Hardware eye/jitter analysis
- Protocol decode (PCIe, USB optional)
High-Speed Probes & Accessories
- Bandwidth matching oscilloscope
- Low loading capacitance (≤0.1 pF)
- Power rail probes for PI testing
Vector Network Analyzer
- Frequency range: typically 40-70 GHz
- 4-port for differential and crosstalk
- De-embedding software included
Accessories
- Differential probe adapters and tips
- Calibration standards (SOLT/TRL)
- Precision test fixtures and PCB coupons
Software
- Eye/jitter analysis software
- S-parameter and de-embedding tools
- Channel simulation and EQ optimization
Our Services
Solution Consultation
Configuration recommendations based on interface standards and data rates
On-site Support
Installation, calibration, and test procedure setup
Rental / Pre-owned Options
Reduce costs for short-term or budget-sensitive projects
Training Services
SI/PI fundamentals and instrument operation training
Our Capabilities
Eye/Jitter Analysis
Real-time eye/mask testing with RJ/DJ/TJ decomposition
S-Parameter Characterization
VNA-based channel modeling with 4-port differential support
De-embedding
Remove fixture/cable losses using 2x-Thru or TRL
Power Integrity
PDN impedance and mV-level ripple capture
Recommended Products
High-Bandwidth Oscilloscopes
Real-time sampling for eye/jitter analysis (bandwidth per project requirements)
View Products →High-Speed Differential Probes
Low-loading probes for clean signal acquisition
View Products →Vector Network Analyzers
S-parameter extraction and channel modeling up to 70 GHz
View Products →Power Rail Probes
mV-level ripple capture for AI/FPGA power validation
View Products →Key Applications
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